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03-31-2008, 06:29 PM
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#16 | | Dont Panic
Join Date: Sep 2005 Location: plymouth nc usa
Posts: 674
| but there might be some interesting wifi apps to write.... or a way to boost it... |
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03-31-2008, 06:42 PM
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#17 | | Registered User
Join Date: Mar 2008
Posts: 36
| wpa2?
(pipe dream, i know...) |
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03-31-2008, 09:01 PM
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#18 | | Software engineer/hacker
Join Date: Jan 2004 Location: Silicon Valley, CA
Posts: 5,061
| well, only in software. the hardware supports WPA-PSK and WEP only
but in software you can do this is mostly a softradio (hardware acceleration is there, but you can pretty much control what bits are sent)
__________________ Annoying me is NOT an approved way of encouraging me to produce software My software:PowerSDHC, PowerDrive, nuRom, UDMH, warpSpeed, PowerDiGi, brightnessFix, etc... Get it all here:http://www.PalmPowerups.com |
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03-31-2008, 11:13 PM
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#19 | | Custom User
Join Date: Jul 2004 Location: Raleigh, NC
Posts: 3,942
| I love the, "well, it would be really hard to reverse engineer" bit...
What you really mean is, it would be really hard for anyone else to reverse engineer, and moderately difficult for me...
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Brad Green - Enthusiast Extraordinaire...
Sony TG-50, Sony TH-55, Palm TX...TH-55 still the best
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03-31-2008, 11:16 PM
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#20 | | Software engineer/hacker
Join Date: Jan 2004 Location: Silicon Valley, CA
Posts: 5,061
| moderately easy for you? sweet. do it! 
__________________ Annoying me is NOT an approved way of encouraging me to produce software My software:PowerSDHC, PowerDrive, nuRom, UDMH, warpSpeed, PowerDiGi, brightnessFix, etc... Get it all here:http://www.PalmPowerups.com |
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04-01-2008, 12:10 AM
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#21 | | i want LD - MD + CF
Join Date: Mar 2007
Posts: 31
| dmitry why don't you create an app that will be able to hack into the other processor and make apps run faster (somewhat like overclocking but here you'd be running two processors at their RAW speed to get things done faster)
this app could be a major success exactly how powerful is the other processor?
can you RUN both palm and linux at the same time like VMware fusion does?
if you can actually do that then you could create an app for that too so is that possible?
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Abhishekaiyar
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Palm Vx --> 6 Palm Lifedrive(s) out of which 5 died
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04-01-2008, 12:19 AM
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#22 | | i want LD - MD + CF
Join Date: Mar 2007
Posts: 31
| someone asked me what i am doing with my 5 dead lifedrives
well within warranty when my lifedrive died, i just gave it to palm and they gave me a sparkling new one
so that's where my dead Ld(s) are  
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Abhishekaiyar
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Palm Vx --> 6 Palm Lifedrive(s) out of which 5 died
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04-01-2008, 01:17 AM
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#23 | | Lifeflash'd and loving it
Join Date: Nov 2006 Location: Phoenix AZ US
Posts: 1,537
| Quote: | Originally Posted by abhishekaiyar dmitry why don't you create an app that will be able to hack into the other processor and make apps run faster (somewhat like overclocking but here you'd be running two processors at their RAW speed to get things done faster)
this app could be a major success exactly how powerful is the other processor?
can you RUN both palm and linux at the same time like VMware fusion does? |
As Dmitry said, this isn't a standalone processor and it will take a lot of hacking to get it to run, say, two different OSs simulataniously, or even for that matter, to overclock the device.
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[b] /*PhreakOnALeash*/
Ryan Rix -- KDE Developer, HomePage |
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04-01-2008, 04:09 AM
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#24 | | Custom User
Join Date: Mar 2006 Location: Germany
Posts: 1,209
| yeh, but still, a really good area to explore... no one knows what advantages can you get from this 
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yeah sorry jjf:)
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04-01-2008, 11:12 AM
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#25 | | Beta Tester
Join Date: Nov 2005 Location: Igloo
Posts: 2,377
| First thing first, we need to find out more about what's actually there... my guess is that it'll be useful more in the line of an embedded device than as a general purpose CPU. Making it a "second" core for the OS would involve a LOT of work -- of course, since Dmitry's planning to write his own OS, he could include some LD hacks for the processor 
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My Palm family:
Palm T|X ~ Palm T|E ~ m130 ~ m125 ~ POSE
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04-01-2008, 11:16 AM
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#26 | | Software engineer/hacker
Join Date: Jan 2004 Location: Silicon Valley, CA
Posts: 5,061
| its a full ARM core.
no MMU, but it does have caches, buffers, a CF, spi, and sdio interface
__________________ Annoying me is NOT an approved way of encouraging me to produce software My software:PowerSDHC, PowerDrive, nuRom, UDMH, warpSpeed, PowerDiGi, brightnessFix, etc... Get it all here:http://www.PalmPowerups.com |
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04-01-2008, 11:23 AM
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#27 | | Lifeflash'd and loving it
Join Date: Nov 2006 Location: Phoenix AZ US
Posts: 1,537
| :wq
make
make install
Have fun hacking D 
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[b] /*PhreakOnALeash*/
Ryan Rix -- KDE Developer, HomePage |
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04-01-2008, 11:50 AM
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#28 | | Behold the Elixir of Life
Join Date: Jun 2003
Posts: 931
| Quote: | Originally Posted by _Em The way you research this stuff is to open up a device, look at the chip part number, then look it up at the chip supply sites to get the data sheet. Those data sheets outline all the capabilities of the chips, not just the ones being used by the product you currently have. |
Thanks!! A good bit of insight, that. |
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04-01-2008, 12:02 PM
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#29 | | Behold the Elixir of Life
Join Date: Jun 2003
Posts: 931
| Dmitry is speaking geek again.  B-B Attempts to define: MMU - Memory Management Unit (MMU) is the part of the processor that is responsible for protecting system resources from unwanted access and also adding the capability for handling virtual memory. In ARM cores, MMU is basically MPU plus added support for virtual memory. MPU - Memory Protection Unit (MPU) is the management unit in the processor that is responsible for shielding of system resources and tasks from unwanted access. RISC - Reduced Instruction Set Computer SPI - a 3-wire bus used by cheap mmc controllers SDIO - Secure Digital Input/Output (able to access Secure Digital cards)
Source: ARM Glossary
Last edited by JavaJiveJump : 04-01-2008 at 03:33 PM.
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04-01-2008, 02:00 PM
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#30 | | Software engineer/hacker
Join Date: Jan 2004 Location: Silicon Valley, CA
Posts: 5,061
| Quote: | Originally Posted by JavaJiveJump Dmitry is speaking geek again.  B-B Attempts to define: MMU - Memory Management Unit (MMU) is the part of the processor that is responsible for protecting system resources from unwanted access and also adding the capability for handling virtual memory. In ARM cores, MMU is basically MPU plus added support for virtual memory. MPU - Memory Protection Unit (MPU) is the management unit in the processor that is responsible for shielding of system resources and tasks from unwanted access. RISC - Reduced Instruction Set Computer SPI - Sequencer Processor Interface inside a (RISC) processor SDIO - Secure Digital Input/Output (able to access Secure Digital cards)
Source: ARM Glossary |
spi is not what you defined - it is a 3-wire bus used by cheap mmc controllers
__________________ Annoying me is NOT an approved way of encouraging me to produce software My software:PowerSDHC, PowerDrive, nuRom, UDMH, warpSpeed, PowerDiGi, brightnessFix, etc... Get it all here:http://www.PalmPowerups.com |
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