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Old 08-25-2008, 01:29 PM   #1
dmitrygr
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Give your TX/LD a multi-gigabyte internal drive

So using my SDHC driver, a few wires, a few free GPIOs in the TX and LD, a bit-banged SD interface, and a few microSdhc cards my TX now has a 32GB internal drive!

How it works? I found 7 free GPIOs on the TX, wired them up to the 4 8gb microSDHC cards internally, and modified my driver to use this as an SD interface, and then to treat the 4 cards as one big card. So now I have a 32GB internal drive that is always with me. The 1-bit bit-banged interface is not stellar-fast (4MBit/s is what I get) but it is enough for me.

The cool part? SD slot still usable normally, no case modifications, driver is in ROM

Same can be done for Treos, LD, T5, Z72, E2, Z31, TC, Zodiac, iQue, etc... Cool huh?
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Last edited by dmitrygr : 08-25-2008 at 01:47 PM.
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Old 08-25-2008, 01:34 PM   #2
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Quote:
Originally Posted by dmitrygr
So using my SDHC driver, a few wires, a few free GPIOs in the TX and LD, a bit-banged SD interface, and a few microSdhc cards my TX now has a 32GB internal drive!

How it works? I found 7 free GPIOs on the TX, wired them up to the 4 8gb microSDHC cards internally, and modified my driver to use this as an SD interface, and then to treat the 4 cards as one big card. So now I have a 32GB internal drive that is always with me. The 1-bit bt-banged interface is not stellarly fast (4MBit/s is what I get) but it is enough for me.

The cool part? SD slot still usable normally, no case modifications, driver is in ROM

Same can be done for Treos, LD, T5, Z72, E2, Z31, TC, Zodiac, iQue, etc... Cool huh?

Yes indeed. Way cool. Except I'm chicken to even try it.......
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Old 08-25-2008, 01:46 PM   #3
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It appears as an internal built-in card that all apps see.

I was posting here just as a research project. I am not at this point offering this process or directions to anyone, [yet?].
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Old 08-25-2008, 01:49 PM   #4
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Also, this idea expands to any size. The more GPIOs I can find to use, the more cards I can use. It's simple. There are 3 common wires, and one for each card. So to have one card you need 4 GPIOs, for 2 cards you need 5, for 4 cards you need 7, and so on...

So if you find 10 free GPIOs in your device you can have (10-3 = 7) 7 cards builtin. The biggest microSDHC you can get is 8GB, so that is 56GB total
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Old 08-25-2008, 01:53 PM   #5
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Hmmm

I guess you're sayin this should be possible without your driver on the Treo? I wonder if the Treo has the same free GPIOs then... see now you've gotten me curious and I might just have to go open this thing up (wonder if Sprint will let me keep this 700p as a text device since they're replacing it tomorrow again under warranty)...
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Old 08-25-2008, 01:58 PM   #6
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Quote:
Originally Posted by dmitrygr

Same can be done for Treos, Cool huh?



Ok

Just give me the address and I'll send you my 755 to try it out on.
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Old 08-25-2008, 02:16 PM   #7
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It needs my driver, of course, but besides that nothing is needed
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Old 08-25-2008, 02:22 PM   #8
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Very cool, would like to see some pics of how you fit everything internally. Do you need a modified SDHC driver to do this?
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Old 08-25-2008, 02:26 PM   #9
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fitting things is not hard. the wires are tiny and the microsdhc card is small. the driver is my SDHC driver with a new AAL(aalModBitBangedSdGpio) and DAL(dalModTxRawGpio) modules
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Old 08-25-2008, 02:36 PM   #10
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One more question. Is it will be possible to improve upon the max 4MBit/s read/write speed?
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Old 08-25-2008, 02:44 PM   #11
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Not really. To get better speeds you need hardware support or faster GPIOs. Clearly the hardware supported SD interface is used by the SD slot, so I have to implement the entire physical layer in software, and Pxa270 does not really work well if you try to toggle GPIOs at more than 4MHz, so the clock pin thus cannot be faster than that. I am not sure you understand what a feat it is to even get 4MBit/s out of it! Most of the sdBitBanged***() functions had to be written in assembly and hand-optimized. the C versions do not attain over 1MBit/s speed.

With hardware you can say to hardware "send command X, wait for Y bytes of data" with bit-banged approach it degrades to "send command X bit by bit by toggling up and down the correct wire, also toggle clock at the same time, and then receive the response bit by bit while toggling clock and keeping to thew SD specced timing" It really is much more work.
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Old 08-25-2008, 02:58 PM   #12
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I always thought programming in assembly was fun you young people, just kidding. And I should know better than to question you. If it was possible you would have done it already. I was just unsure of the hardware limitations.
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Old 08-25-2008, 03:07 PM   #13
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ARM assembly is fun. The not-fun part is having to order instructions by hand to get the timing right and at the same time introduce no delays.
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Old 08-25-2008, 03:54 PM   #14
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GPIOs

I had to look this stuff up to try to understand what you are saying!!


General Purpose Input/Output

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General (GPIO) devices provide a set of IO ports that can be configured for either input or output, compounded by the resemblance to GP1 and GP0. One special kind of GPIO is SGPIO.

The general-purpose input/output (GPIO) peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. When configured as an output, you can write to an internal register to control the state driven on the output pin. When configured as an input, you can detect the state of the input by reading the state of an internal register.

In addition, the GPIO peripheral can produce CPU interrupts and enhanced Direct Memory Access (EDMA) events in different interrupt/event generation modes.
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Old 08-25-2008, 04:00 PM   #15
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in my context GPIO is a a processor pin that the processor can control as being one of {output: 0, output: 1, input: Hi-Z}

Sadly no interrupts or DMA in this case
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