View Single Post
Old 04-18-2004, 10:51 AM   #23
CliePet
Registered User
 
Join Date: Feb 2003
Posts: 1,424 CliePet is on a distinguished road
> I'm guessing that these Sony DAL APIs send privledged-mode ARM coprocessor instructions...

You would think so...
However the clock tweeking APIs appear to be partying on two Sony-specific memory locations to control the clock speed
(accessible in user or privledged mode, 68K or ARM code)

The CPU performance appears to be linear with one value in memory. This maxes out at $F4 (/2 = 122MHz)

The second memory location appears to be a multiplier, but all the combinations I've tried still top out at 122/123 MHz.

NOTE: these are in the Sony specific memory region. I assume this is part of the HHE control registers ($80240000).
This memory layout appears to be slightly different between the HHE in the UX50 and newer TH55. It doesn't exist on non-HHE devices.

----
> As of now I have no idea how to include inline ARM assembly...

Not necessary in this case (my test program is a regular 68K program).

For direct ARM assembly with CodeWarrior V9 it is very simple, abeit poorly documented: For example:
----
static asm UInt32 AddTwoNumbers(UInt32 arg_in_r0, UInt32 arg_in_r1)
{
add r0,r0,r1
bx lr // return result in R0
}
CliePet is offline   Reply With Quote